Key Skills: DFT , DFT, MBITS, ATPG

Experience in 1-2 full chip project for DFT insertion and verification

ASIC/SoC with First Time Silicon success

Scan, ATPG, Memory BIST(MBIST), JTAG, LBIST, Scan Compression(EDT)
Job Description

Digital circuit design knowledge

Hands on in verification, RTL coding

Good experience in ATPG, Scan, Scan Compression techniques, Memory BIST, JTAG, Logic BIST, EDT

Experience in Verilog/VHDL is desirable

Experience in Gate Level Simulations

Full chip experience is an advantage

Experience in low power/multi-power domain/multi-voltage designs

Experience in the latest technology nodes like 32/45/65/90

Synthesis and STA is nice to have

Hands on in Synopsys/Mentor/Cadence DFT Tools

Perl and Unix

Scripting and automation